Selected for the NTU Global Connect Fellowship, a competitive international summer research program with an acceptance rate below 2%; supervised by Gwee Bah Hwee and Juncheng Chen. Continued the project as a remote collaborator after the July-August 2026 fellowship.
Developed conditional DDPM experiments on controlled synthetic traces and four measured AES datasets, evaluating predicted-clean traces across all 400 reverse-diffusion stages.
Developed complementary evaluation pipelines using CPA-based key-recovery complexity, waveform and distribution distances, and nearest-neighbor likelihood scoring.
Found that attack-relevant leakage can emerge substantially earlier than full distributional fidelity. On masked traces, matching first-order marginals alone was insufficient to reproduce the cross-share dependence required for second-order attacks.
First author of Multiplying Not-So-Big Integers with FFTs: Finding and Pushing the Crossover on Large Modern OoO ARM CPUs, published as IACR ePrint 2026/2366 and accepted for the CHES 2026 Poster Session.
Developed constant-time NEON-optimized NTT-based large-integer multiplication on AArch64, including fused NTT kernels, Barrett and Montgomery arithmetic, Good’s trick, CRT reconstruction, and chunking and dechunking.
Independently developed second-generation 5,632- and 8,448-bit multiplication paths on Cortex-A76. They outperform a target-tuned variable-time GMP baseline by 6.25% and 16.66%, respectively, placing the observed crossover at or below 5,632 bits.
Integrated NTT-based Montgomery multiplication into OpenSSL RSA. Across RSA-5120, RSA-6144, RSA-8192, and RSA-10240, end-to-end verification and encryption improve by 15.98%-51.58%.
Formally verified optimized assembly kernels with CryptoLine for algebraic correctness, range safety, and equivalence after Slothy scheduling; used HOL Light to compose higher-level multiplication specifications.
AArch64 NEON and ARMv7E-M
ARM NEON intrinsics, CryptoLine, SLOTHY